Field of Invention
The present invention relates generally to semiconductor modules and methods for packaging the same and, more particularly, to semiconductor modules that incorporate three dimensional stacking of devices.
Discussion of Related Art
Electronic modules generally include active integrated circuits (ICs) and associated analog circuitry situated and interconnected on a main substrate board. One or more metallization layers on the substrate board provide conductive traces that interconnect the various electronic devices making up the module. The current technology for “system in package” modules combines active devices (e.g., CMOS devices formed in silicon) with discrete surface mount passive components (e.g., capacitors, inductors and resistors) in a two dimensional planar geometry on a substrate board, to provide a module with a given electrical function. Generally, the active devices are located near the center of the board, while the passive components are located around the edges of the board.
For many applications, including cellular handset and other wireless/mobile applications, it is important that the size of the main substrate board be as small as possible. One factor requiring reductions in the size of the board is the physical dimension of an associated product which makes use of the board (e.g., a cellular handset or MP3 player). Therefore, higher density modules are desirable to pack more functionality into less space. Accordingly, it becomes crucial to configure and package the individual module devices so that the surface area of the substrate board is optimized.
There have been several attempts to address the problem of adding increased functionality to substrate boards with limited space. Many of these include methods of packaging devices, including integrated circuits, in a vertical, or three-dimensional, geometry. For example, thin film technology has been used to stack one active die on top of another, particularly to create high density memory devices. A thin film of adhesive is disposed over the lower die to act as a spacer and allow another die to be stacked on top of, and secured to, the lower die. The adhesive is thermally sensitive such that it can be heated and applied over the lower die in liquid form so as not to bend the bond wires that connect the lower die to the substrate board. This process allows stacking of multiple, similar, active devices, for example, stacking of memory ICs with other application specific integrated circuits (ASICs).
In another example, where a great number of passive devices are required in a high density circuit, active devices have been stacked over integrated passive devices. The term “integrated passive device” as used herein refers to a passive device that is integrally formed with a substrate, such as a printed circuit board. Integrated passive devices are created using semiconductor processing techniques, such as dielectric film and metal deposition (e.g., silicon on insulator and/or thin-film technology). Active devices can then be disposed on substrates that incorporate integrated passive devices, resulting in stacking of the active devices above the integrated passive devices. This approach is often presently preferred because stacking similar device technologies, for example, a CMOS ASIC with a CMOS passive network, uses processes that are already used for stacking multiple active devices (e.g., stacking memory ICs with ASICs), as discussed above. One such example that combines integrated passive devices with active ICs is described in U.S. Pat. No. 5,670,824 to Weinberg, entitled “Vertically integrated device assembly incorporating active and passive components” which discloses an electronic assembly formed as a multi-layered structure having integrated passive devices disposed on a substrate layer.